The back-plane of the Omega platform is intended as the only place a function card is connected to the rest of the system. Each card consists of a back-end and a front-end. The back-end is the connection to the back-plane, and is where all power, configuration and synchronisation is derived. The back-plane allows arbitrary signalling from card-to-card, defined by the back-end function within the core FPGA. In addition card-to-card communication can be effected via Ethernet across the back-plane.
Card-to-card signalling may be:
- Logic level or edge signalling (e.g. triggers, clocks)
- High-speed via back-plane ethernet
Back-plane to card signalling may be:
- Clocks from the control board
- Configuration data for uC and FPGA
- Application data via back-plane USB or Ethernet
- Analog reference
Slot Zero control function
The backplane is symmetric, except for slot 0. This is the master, or control slot and can host only the control card. This card will be responsible for providing the host interface, master clock and all configuration data.
Signals sent into slot 0 are mirrored and distributed to all other slots.
Other back-plane designs
Commercial systems like this are common and varied. There are several back-plane standards, such as VME, VME64, PXI. Connectivity via LXI using Ethernet is also a new trend. We will avoid these standards and define the back-plane signalling purely based on the application. Connectivity via fixed connections (USB, Ethernet) is provided, but no further standardisation is necessary.